1. Technical Field
This invention relates generally to the field of semiconductors and, more particularly, to improved approaches for fabricating a replacement high-k metal gate transistor device.
2. Related Art
The semiconductor integrated circuit (IC) industry has experienced rapid growth in recent years. Specifically, generations of ICs have been produced whereby each generation has smaller and more complex circuits than the previous generation. However, for these advances to be realized, developments in IC processing and manufacturing are needed. Under this course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased.
Replacement high-k metal gate stacks have been commonly adopted as a way to meet aggressive scaling in metal-oxide semiconductor field effect transistor (MOSFET) technology. While there may be different integration processes to achieve a final structure, a common step in many schemes involves first forming a polysilicon “dummy” gate. The dummy gate is removed by an etch process, which can be wet or a combination of wet and RIE, and the space is then backfilled with the metal gate stack. In one approach, the high-k dielectric is deposited during the dummy gate build process, and the dielectric is then retained. In another last scheme, a high-k dielectric is deposited first before the metal gate stack into the space left after the poly gate removal. Two sets of metal gate stacks are needed to satisfy the different work function requirement of the PFET and NFET transistors.
A typical PFET metal gate stack may comprise titanium nitride (TiN), ruthenium (Ru), titanium nitride (TiNi), and an NFET metal gate may comprise titanium aluminum (TiAl). To lower gate resistance, a layer of metal such as aluminum (Al) is deposited over the work function metal. In a full complimentary metal-oxide semiconductor field effect transistor (CMOS FET) build, some scheme may have an additional etch barrier. In a PFET metal first scheme, PFET metal is deposited firstly followed by its removal from NFET transistor, then NFET metal is deposited on both NFET and PFET. In a NFET metal first scheme, NFET and PFET work function metal deposition sequence is opposite. One challenge of replacement metal gate schemes is to fill the dummy gate with enough work function metal (WFM) and Al to meet both the device performance and gate resistance specification. Unfortunately, it has been found that Al can diffuse through the WFM layer towards the dielectric causing device degradation. This tendency is even more pronounced in the PFET metal first scheme.